Regviz

Silicon Labs /Series1 /EFM32GG12B /EFM32GG12B430F512GL112 /SDIO /ROUTELOC0

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Interpret as ROUTELOC0

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https://regviz.com/r/Silicon Labs/Series1/EFM32GG12B/EFM32GG12B430F512GL112/SDIO/ROUTELOC0#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LOC0)DATLOC0 (LOC0)CDLOC0 (LOC0)WPLOC0 (LOC0)CLKLOC

WPLOC=LOC0, CLKLOC=LOC0, DATLOC=LOC0, CDLOC=LOC0

Description

I/O LOCATION Register

Fields

DATLOC

I/O Location for D0-7 Pins

0 (LOC0): Location 0

1 (LOC1): Location 1
CDLOC

I/O Location for CD

0 (LOC0): Location 0

1 (LOC1): Location 1

2 (LOC2): Location 2

3 (LOC3): Location 3
WPLOC

I/O Location for WP

0 (LOC0): Location 0

1 (LOC1): Location 1

2 (LOC2): Location 2

3 (LOC3): Location 3
CLKLOC

I/O Location for CLK

0 (LOC0): Location 0

1 (LOC1): Location 1

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data